Added manual phase offset
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parent
208c5709d6
commit
46d6bf1001
26
src/lib.rs
26
src/lib.rs
@ -227,6 +227,14 @@ enum Register {
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Clk5 = 21,
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Clk5 = 21,
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Clk6 = 22,
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Clk6 = 22,
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Clk7 = 23,
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Clk7 = 23,
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Clk0Phoff = 165,
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Clk1Phoff,
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Clk2Phoff,
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Clk3Phoff,
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Clk4Phoff,
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Clk5Phoff,
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Clk6Phoff, //Not in datasheet
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Clk7Phoff, //Not in datasheet
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PLLReset = 177,
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PLLReset = 177,
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CrystalLoad = 183,
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CrystalLoad = 183,
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}
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}
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@ -367,6 +375,8 @@ pub trait Si5351 {
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fn setup_multisynth_int(&mut self, ms: Multisynth, mult: u16, r_div: OutputDivider) -> Result<(), Error>;
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fn setup_multisynth_int(&mut self, ms: Multisynth, mult: u16, r_div: OutputDivider) -> Result<(), Error>;
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fn setup_multisynth(&mut self, ms: Multisynth, div: u16, num: u32, denom: u32, r_div: OutputDivider) -> Result<(), Error>;
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fn setup_multisynth(&mut self, ms: Multisynth, div: u16, num: u32, denom: u32, r_div: OutputDivider) -> Result<(), Error>;
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fn select_clock_pll(&mut self, clocl: ClockOutput, pll: PLL);
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fn select_clock_pll(&mut self, clocl: ClockOutput, pll: PLL);
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fn set_phase_offset(&mut self, clk: ClockOutput, phase_offset: u8) -> Result<(), Error>;
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}
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}
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impl<I2C, E> Si5351Device<I2C>
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impl<I2C, E> Si5351Device<I2C>
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@ -555,6 +565,22 @@ impl<I2C, E> Si5351 for Si5351Device<I2C> where
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Ok(())
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Ok(())
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}
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}
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fn set_phase_offset(&mut self, clk: ClockOutput, phase_offset: u8) -> Result<(), Error> {
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if phase_offset & 1<<7 > 0 {return Err(Error::InvalidParameter);}
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let reg = match clk {
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ClockOutput::Clk0 => Register::Clk0Phoff,
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ClockOutput::Clk1 => Register::Clk1Phoff,
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ClockOutput::Clk2 => Register::Clk2Phoff,
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ClockOutput::Clk3 => Register::Clk3Phoff,
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ClockOutput::Clk4 => Register::Clk4Phoff,
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ClockOutput::Clk5 => Register::Clk5Phoff,
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ClockOutput::Clk6 => Register::Clk6Phoff,
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ClockOutput::Clk7 => Register::Clk7Phoff,
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};
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self.write_register(reg, phase_offset)?;
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Ok(())
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}
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fn set_clock_enabled(&mut self, clk: ClockOutput, enabled: bool) {
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fn set_clock_enabled(&mut self, clk: ClockOutput, enabled: bool) {
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let bit = 1u8 << clk.ix();
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let bit = 1u8 << clk.ix();
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if enabled {
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if enabled {
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